1. Field of the Invention
This invention relates to improvement of gate oxide integrity in CMOS integrated circuits.
2. Brief Description of the Prior Art
Conventional CMOS integrated circuits utilizing clad silicide on moats suffer from potential leakage paths along the sidewall surface of the etched polysilicon gates, a region where the electrical field strength is high due to enhanced electric field lines at the edge of the polysilicon conductor. Many types of semiconductor devices, such as DRAMs and EPROMs minimize this problem by oxidizing the gate polysilicon after the gate etch to form a high quality interface at the edge of the polysilicon. Oxidation of the polysilicon post gate etch could, in principle, be utilized, however there are three drawbacks. First, the enhanced oxidation under the gate edge (smile effect) would reduce drive currents and might even lead to reduced electrical coupling of the gate to the source/drain. Second, the enhanced oxidation rate of heavily doped polysilicon compared to lightly doped moats leads to thicker oxide on the polysilicon that is more difficult to remove before silicide formation. Third, high temperature oxidation of polysilicon can lead to enhanced diffusion of electrical dopants in p-n junctions of bipolar transistors which result in unacceptable electrical performance.
A second gate oxide integrity related problem can be caused by electrical leakage from the gate electrode 11 to the silicon 3 along a path between sidewall oxide 4 and gate oxide 6 and then by leakage to silicon along the edge where gate oxide is etched during sidewall oxide overetch 5, as shown in FIG. 1.
A third gate oxide integrity problem arises because of damage to the gate oxide in the region 6 adjacent to the gate 11, caused by the reachthrough implant, which is implanted into regions 15 of FIG. 1 before the sidewall oxide 4 is formed.
A protection technique which has been used is formation of a sidewall oxide wherein an oxide is deposited over the entire moat, the oxide then being etched back isotropically to leave oxide on the sidewalls of the polysilicon. This technique has helped but does not completely satisfy the problem set forth above. A further protection technique has involved oxidation of the polysilicon gate material. This type of oxide is thermal and is better than the deposited oxide in that it makes a cleaner, higher quality seal with the polysilicon with fewer electrically conducting oxide charges. In each case, with the sidewall oxide in place, titanium is then deposited over the entire surface and reacted with the exposed silicon to form titanium silicide, generally over the source/drain regions and the polysilicon gate, but not over the oxide. However, it is necessary to remove all oxide layers over the gate or over the silicon except for the sidewall oxide to form the silicide and this requires extra costly processing steps.